
dsPIC30F3010/301
1
DS70141F
-pag
e
50
2010
Microchip
T
e
chnolo
g
y
Inc.
TABLE 5-2:
INTERRUPT CONTROLLER REGISTER MAP(1)
SFR
Name
ADR
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset State
INTCON1
0080 NSTDIS
—
OVATE
OVBTE
COVTE
—
MATHERR
ADDRERR
STKERR OSCFAIL
—
0000 0000 0000 0000
INTCON2
0082
ALTIVT
DISI
—
INT2EP
INT1EP
INT0EP
0000 0000 0000 0000
IFS0
0084
CNIF
MI2CIF
SI2CIF
NVMIF
ADIF
U1TXIF
U1RXIF
SPI1IF
T3IF
T2IF
OC2IF
IC2IF
T1IF
OC1IF
IC1IF
INT0IF
0000 0000 0000 0000
IFS1
0086
—
U2TXIF
U2RXIF
INT2IF
T5IF
T4IF
OC4IF
OC3IF
IC8IF
IC7IF
INT1IF
0000 0000 0000 0000
IFS2
0088
—
—FLTAIF
—
QEIIF
PWMIF
—
0000 0000 0000 0000
IEC0
008C
CNIE
MI2CIE
SI2CIE
NVMIE
ADIE
U1TXIE
U1RXIE
SPI1IE
T3IE
T2IE
OC2IE
IC2IE
T1IE
OC1IE
IC1IE
INT0IE
0000 0000 0000 0000
IEC1
008E
—
U2TXIE
U2RXIE
INT2IE
T5IE
T4IE
OC4IE
OC3IE
IC8IE
IC7IE
INT1IE
0000 0000 0000 0000
IEC2
0090
—
—FLTAIE
—
QEIIE
PWMIE
—
0000 0000 0000 0000
IPC0
0094
—
T1IP<2:0>
—OC1IP<2:0>
—IC1IP<2:0>
—
INT0IP<2:0>
0100 0100 0100 0100
IPC1
0096
—
T31P<2:0>
—
T2IP<2:0>
—
OC2IP<2:0>
—IC2IP<2:0>
0100 0100 0100 0100
IPC2
0098
—ADIP<2:0>
—
U1TXIP<2:0>
—
U1RXIP<2:0>
—
SPI1IP<2:0>
0100 0100 0100 0100
IPC3
009A
—
CNIP<2:0>
—MI2CIP<2:0>
—
SI2CIP<2:0>
—NVMIP<2:0>
0100 0100 0100 0100
IPC4
009C
—
OC3IP<2:0>
—
IC8IP<2:0>
—IC7IP<2:0>
—
INT1IP<2:0>
0100 0100 0100 0100
IPC5
009E
—
INT2IP<2:0>
—
T5IP<2:0>
—
T4IP<2:0>
—OC4IP<2:0>
0100 0100 0100 0100
IPC6
00A0
—
U2TXIP<2:0>
—
U2RXIP<2:0>
0100 0000 0100 0100
IPC7
00A2
—
0000 0000 0000 0000
IPC8
00A4
—
0000 0000 0000 0000
IPC9
00A6
—
PWMIP<2:0>
—
—INT41IP<2:0>
—
INT3IP<2:0>
0100 0000 0100 0100
IPC10
00A8
—
FLTAIP<2:0>
—
—QEIIP<2:0>
0100 0000 0000 0100
IPC11
00AA
—
0000 0000 0000 0000
Legend:
— = unimplemented, read as ‘0’
Note
1:
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.